Thursday, September 27, 2012

POWER Double Stuff vs SPARC Critical-Thread

[Sun UltraSPARC T3 16 core CPU Diagram]
Computing processor models differ in architecture from one company to another, each trying to gain an edge in the market over their competitors. Often, chip foundries will attempt radical approaches to conquer a problem, but incremental improvement will often bring radical ideas back to similar conclusions in the end. A comparison between SPARC and POWER architectures is no different.

Oracle Today: SPARC T4
It seems that Oracle/Sun approached performance from one direction, from massive thread counts & high throughput, eventually growing to fast cores with a critical thread api - so single threaded bottlenecked software gets more hardware resources dynamically (and only when needed or optionally provisioned at the VM layer.) This was available for a year in the SPARC T4, due to pressure from customers for better single thread performance.

IBM Tomorrow: POWER 7+
Then it seems IBM approached performance from the other direction, from massive single thread speed, incrementing cores, and eventually appearing with a physical socket architecture swap of more cores or less cores (and only at purchase time.) Oddly, this option is only being made a year after the SPARC T4 was released, possibly because of pressure from their customers for higher throughput?

Which way looks better in practice?

That is a good question. When the SPARC T5 is released, around the same time the POWER 7+ is released - the question will be begged... was IBM's new choice offered to the customer at POWER 7+ purchase time better than the 1+ year old choice offered to the customer while SPARC software at run time (or VM restart time)?

We will have to see what the benchmarks suggest.

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